This invention relates to a method of manufacturing a semiconductor device, and more particularly to a processing implemented prior to dicing the semiconductor wafer.
In the case of dicing the semiconductor wafer, on the dicing lines, patterns indispensable for manufacturing such as mask alignment marks and/or quality control marks, etc. exist in respective layers. In general, such marks are formed by metal pattern or silicon oxide film, etc.
Hitherto, such an approach was employed to carry out dicing of the semiconductor wafer in the state where marks comprised of metal pattern are left on the semiconductor wafer to quarry semiconductor chips to carry out packaging. However, when dicing is carried out, the end portion of the metal pattern constituting the mark is turned up. As a result, in carrying out TAB (Tape Automated Bonding) packaging or wire bonding packaging, problems as described below have arisen.
In the TAB packaging, the inner lead and the metal pattern turned up at the edge portion of the semiconductor chip are caused to be in contact with each other. As a result, short circuit takes place between terminals adjacent through the metal pattern. In addition, the metal pattern which has been caused to be in contact with the substrate such as device characteristic monitor pattern, etc. existing at the edge portion of the semiconductor chip comes into contact with the inner lead. As a result, the p-type semiconductor substrate short-circuits with the ground terminal and the n-type semiconductor substrate short-circuit with the power supply terminal.
In the wire bonding packaging, the bonding wire and the metal pattern of the edge portion of the semiconductor chip are caused to be in contact with each other. As a result, short circuit takes place between terminals adjacent through the metal pattern. In addition, the metal pattern which has been in contact with the substrate at the edge portion of the semiconductor chip comes into contact with the bonding wire. As a result, the p-type semiconductor substrate short-circuits with the ground terminal and the n-type semiconductor substrate short-circuits with the power supply terminal.
As described above, hitherto, there was the problem that the metal pattern turned up at the time of dicing gives rise to inconveniences in the electric characteristic.